Static random access memories (“SRAM”) include a plurality of cells disposed in rows and columns to form an array. Conventional SRAM cells include a plurality of transistors coupled to bit lines and word lines that are used to read and write a bit of data to the memory cell. Some conventional SRAMs include a keeper circuit for assistance during read operations. However, these conventional keeper circuits may have high DC leakage currents, especially during low voltage operation, and result in SRAM having slow operating times.